22 lines
361 B
Systemverilog
22 lines
361 B
Systemverilog
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module controller
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(input logic clk,
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input logic reset,
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input logic sensor_l,
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input logic sensor_m,
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input logic sensor_r,
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input logic [?:0] count_in,
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output logic count_reset,
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output logic motor_l_reset,
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output logic motor_l_direction,
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output logic motor_r_reset,
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output logic motor_r_direction);
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endmodule
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