Removed latch
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@ -1,3 +1,5 @@
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`timescale 1ns/1ps
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module motorcontrol #(parameter N=21)
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(input logic clk,
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input logic rst,
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@ -37,6 +39,11 @@ module motorcontrol #(parameter N=21)
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pwm = 0;
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next_state = state;
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end
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default:
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begin
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pwm = 0;
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next_state = reset;
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end
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endcase
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end
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endmodule
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@ -18,12 +18,15 @@ module motorcontrol_tb();
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clk = 0;
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initial begin
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rst = 1; direction = 0;
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#10; rst = 0;
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#19999990; rst = 1; direction = 1;
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#10; rst = 0;
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#19999990; rst = 1;
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#10; rst = 0;
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$dumpfile("output.vcd");
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$dumpvars;
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rst = 1; direction = 0;
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#10; rst = 0;
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#19999990; rst = 1; direction = 1;
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#10; rst = 0;
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#19999990; rst = 1;
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#10; rst = 0;
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$finish;
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end
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endmodule
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