Fixed code not working

This commit is contained in:
xeovalyte 2025-02-20 12:57:17 +01:00
parent 39b767629c
commit 7752316651
Signed by: xeovalyte
SSH Key Fingerprint: SHA256:kSQDrQDmKzljJzfGYcd3m9RqHi4h8rSwkZ3sQ9kBURo
4 changed files with 25 additions and 0 deletions

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@ -1,3 +1,5 @@
`timescale 1ns/1ps
module controller #(parameter N=21)
(input logic clk,
input logic reset,
@ -25,6 +27,8 @@ always_ff @(posedge clk, posedge count_reset, posedge reset) begin
state <= next_state;
end
logic [2:0] sensors_lmr;
assign sensors_lmr = {sensor_l, sensor_m, sensor_r};
always_comb begin
@ -54,36 +58,48 @@ always_comb begin
motor_l_direction = 1;
motor_r_reset = 0;
motor_r_direction = 0;
next_state = state;
end
Gentle_l: begin
motor_l_reset = 1;
motor_l_direction = 0;
motor_r_reset = 0;
motor_r_direction = 0;
next_state = state;
end
Sharp_l: begin
motor_l_reset = 0;
motor_l_direction = 0;
motor_r_reset = 0;
motor_r_direction = 0;
next_state = state;
end
Gentle_r: begin
motor_l_reset = 0;
motor_l_direction = 1;
motor_r_reset = 1;
motor_r_direction = 0;
next_state = state;
end
Sharp_r: begin
motor_l_reset = 0;
motor_l_direction = 1;
motor_r_reset = 0;
motor_r_direction = 1;
next_state = state;
end
default: begin
motor_l_reset = 1;
motor_l_direction = 0;
motor_r_reset = 1;
motor_r_direction = 0;
next_state = state;
end
endcase

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@ -1,3 +1,5 @@
`timescale 1ns/1ps
module inputbuffer
(input logic clk,
input logic sensor_l_in,

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@ -1,3 +1,5 @@
`timescale 1ns/1ps
module robot
(input logic clk,
input logic reset,

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@ -29,6 +29,9 @@ module robot_tb();
end
initial begin
$dumpfile("output.vcd");
$dumpvars;
#0ms; sensors = 3'b000; // Forward
#70ms; sensors = 3'b001; // Gentle left
#40ms; sensors = 3'b010; // Forward
@ -37,6 +40,8 @@ module robot_tb();
#40ms; sensors = 3'b101; // Forward
#40ms; sensors = 3'b110; // Sharp right
#40ms; sensors = 3'b111; // Forward
#40ms; $finish;
end
endmodule